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AD9559BCPZ
+BOMIC CLK TRANSLATOR PLL 72-LFCSP
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メーカーテキサス・インスツルメンツ
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メーカー品番 #AD9559BCPZ
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データシート AD9559BCPZ DataSheet
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在庫状況5107
365 日間品質保証
7*24 日間の品質保証
90-時間単位のサービス保証
1日間のアフターサービス保証
仕様
| 属性 | 値 |
| Supplier | Rochester Electronics, LLC,Analog Devices Inc. |
| Package | Bulk,Tray |
| ProductStatus | Active |
| PLL | Yes |
| MainPurpose | Ethernet, SONET/SDH, Stratum |
| Input | LVDS, LVPECL |
| Output | CMOS, HSTL, LVDS |
| NumberofCircuits | 1 |
| Ratio-Input:Output | 4:4 |
| Differential-Input:Output | Yes/Yes |
| Frequency-Max | 1.25GHz |
| Voltage-Supply | 1.71V ~ 3.465V |
| OperatingTemperature | -40°C ~ 85°C |
| MountingType | Surface Mount |
| Package/Case | 72-VFQFN Exposed Pad, CSP |
概要
Description
- Two independent PLLs with programmable dividers for flexible output frequencies
- Multiple outputs per PLL in LVDS/CMOS/CML formats
- Jitter-cleaning capability, spread-spectrum, and holdover
- SPI (serial) control interface for configuration and status
Common applications: clock distribution and generation for data converters, high-speed interfaces, RF/communications equipment, and timing-critical digital systems.
Package note: BC PZ indicates a RoHS-compliant lead-free variant in Analog Devices’ packaging family; check the datasheet for exact package type and physical/electrical specs (supply, temp, jitter, output voltages). For precise capabilities and limits, consult the AD9559 datasheet.
Equivalent
- Analog Devices: AD9523-1 / AD9528 / AD9558
- Silicon Labs: Si534x clock generators
- TI: LMK04816 / LMK04906 family
Please share your required specs (frequencies, jitter, number of outputs) for a precise cross-reference.
Features
- Eight clock outputs with selectable formats (LVDS/LVPECL/CMOS) per channel
- Dual PLLs with fractional-N synthesis for flexible output frequencies
- Spread Spectrum Clock Generation (SSCG) to reduce EMI
- Per-output programmable drive strength, skew, duty cycle, and enable/disable
- Phase alignment and coordinated output timing across channels
- Flexible reference input with jitter tolerance and optional jitter cleaning
- SPI/serial programming interface for full on-chip configuration and monitoring
- Low-power, RoHS-compliant package (BCPZ) suitable for industrial environments
Note: For exact electrical specs (jitter figures, frequency range, input ranges, drive levels), refer to the AD9559 data sheet.
Pinout
Function: Multi-output clock generator/PLL (low-jitter clock synthesizer) that produces multiple synchronized clock outputs from a reference input.
Manufacturer
Application
- Clocking for high-speed ADCs/DACs, FPGAs, and SERDES in telecom/datacom
- RF/microwave transceivers and phased-array systems
- Timing networks in instrumentation and test & measurement equipment
- SDR and wireless infrastructure base stations
- Data-center backplane timing and synchronization
- Aerospace/defense timing and synchronization systems