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SI53340-B-GMR
+BOMIC CLK BUFFER 2:4 LVDS 16QFN
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メーカースカイワークス・ソリューションズ株式会社
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メーカー品番 #SI53340-B-GMR
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データシート SI53340-B-GMR DataSheet
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パッケージ VFQFN-16
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在庫状況5645
365 日間品質保証
7*24 日間の品質保証
90-時間単位のサービス保証
1日間のアフターサービス保証
仕様
| 属性 | 値 |
| Supplier | Skyworks Solutions Inc. |
| Package / Case | Tape & Reel (TR),Cut Tape (CT) |
| Part Status | Active |
| Type | Fanout Buffer (Distribution), Multiplexer |
| Number of Circuits | 1 |
| Ratio - Input: Output | 2:4 |
| Differential - Input: Output | Yes/Yes |
| Input | CML, HCSL, LVCMOS, LVDS, LVPECL |
| Output | CML, HCSL, LVCMOS, LVDS, LVPECL |
| Frequency - Max | 1.25 GHz |
| Voltage - Supply | 1.71V ~ 3.63V |
| Operating Temperature | -40°C ~ 85°C |
| Mounting Type | Surface Mount |
概要
Description
Pinout
- Function: Four-output, programmable clock generator/PLL device. Derives multiple low-jitter clock signals from a reference, controllable via I2C/SPI (frequency, drive, and output type configurable).
Manufacturer
- What kind of company: A fabless semiconductor company that designs and sells mixed-signal/analog and digital ICs, including timing/clock generation devices, wireless ICs, sensors, and related products; manufacturing is outsourced to third-party foundries.
Application
- FPGA/SoC timing: reference clocks, clock distribution, and multi-domain synchronization
- High-speed serial interfaces: jitter cleaning for PCIe, SATA, USB, Ethernet
- Multi-domain clock translation and synchronization across different clock domains
- Backplane, telecom, and datacom timing networks requiring low jitter
- Memory interface timing (DDR/LPDDR) and related data-path clocks
- Test/measurement equipment and reference clock sources
These use cases benefit from low jitter, freedom to set multiple output frequencies, and flexible input/output options.