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SN74HCT273PWR
+BOMIC FF D-TYPE SNGL 8BIT 20TSSOP
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メーカーSTマイクロエレクトロニクス
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メーカー品番 #SN74HCT273PWR
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在庫状況5768
365 日間品質保証
7*24 日間の品質保証
90-時間単位のサービス保証
1日間のアフターサービス保証
仕様
| 属性 | 値 |
| Supplier | Texas Instruments,Rochester Electronics, LLC |
| Package | Tape & Reel (TR),Cut Tape (CT),Bulk |
| Series | 74HCT |
| ProductStatus | Active |
| Function | Master Reset |
| Type | D-Type |
| OutputType | Non-Inverted |
| NumberofElements | 1 |
| NumberofBitsperElement | 8 |
| ClockFrequency | 37 MHz |
| MaxPropagationDelay@VMaxCL | 29ns @ 5.5V, 50pF |
| TriggerType | Positive Edge |
| Current-OutputHighLow | 4mA, 4mA |
| Voltage-Supply | 4.5V ~ 5.5V |
| Current-Quiescent(Iq) | 8 µA |
| InputCapacitance | 3 pF |
| OperatingTemperature | -40°C ~ 85°C (TA) |
| MountingType | Surface Mount |
| SupplierDevicePackage | 20-TSSOP |
概要
Description
SN74HCT273PWR is an 8‑bit D‑type transparent latch with tri‑state outputs from TI’s HCT family.
Key points:
- Features eight data inputs (D0–D7), eight outputs (Q0–Q7), a latch‑enable input (LE), and an active‑low output‑enable input (OE).
- When LE is high, Qn follows Dn; when LE goes low, Qn holds the last latched value.
- OE low enables the outputs; OE high tri‑states them.
- Operates from 4.5–5.5 V with TTL-compatible (HCT) inputs.
- Used for data storage, simple buffering, and bus sharing between devices; not edge‑triggered (that would be a register like 74HCT374).
Package suffix PWR indicates a specific Pb‑free package variant. For synchronous storage, consider edge‑triggered parts; use the 273 when you need an 8‑bit latch/buffer with tri‑state outputs.
Key points:
- Features eight data inputs (D0–D7), eight outputs (Q0–Q7), a latch‑enable input (LE), and an active‑low output‑enable input (OE).
- When LE is high, Qn follows Dn; when LE goes low, Qn holds the last latched value.
- OE low enables the outputs; OE high tri‑states them.
- Operates from 4.5–5.5 V with TTL-compatible (HCT) inputs.
- Used for data storage, simple buffering, and bus sharing between devices; not edge‑triggered (that would be a register like 74HCT374).
Package suffix PWR indicates a specific Pb‑free package variant. For synchronous storage, consider edge‑triggered parts; use the 273 when you need an 8‑bit latch/buffer with tri‑state outputs.
Equivalent
Equivalent devices to SN74HCT273PWR include:
- 74HCT273 from other manufacturers such as Nexperia (74HCT273D), STMicroelectronics (74HCT273), On Semiconductor (MC74HCT273 / 74HCT273), Renesas (uPD74HCT273), Rohm (D74HCT273).
All are 8-bit D-type transparent latches with 3-state outputs.
- 74HCT273 from other manufacturers such as Nexperia (74HCT273D), STMicroelectronics (74HCT273), On Semiconductor (MC74HCT273 / 74HCT273), Renesas (uPD74HCT273), Rohm (D74HCT273).
All are 8-bit D-type transparent latches with 3-state outputs.
Features
SN74HCT273PWR features:
- 8-bit D-type transparent latch with 3-state outputs
- D0–D7 data inputs; Q0–Q7 outputs
- Latch enable input G: when G is asserted, Q follows D; when G is deasserted, Q holds
- Output enable input OE: controls tri-state outputs (outputs enabled or placed in high impedance)
- HCT family: TTL-compatible inputs, 4.5–5.5 V supply
- Low-power CMOS design suitable for fast bus and storage apps
- Typical use as an octal register/buffer with bidirectional bus interface
- Available in standard package options (including PWR lead-free variants)
- 8-bit D-type transparent latch with 3-state outputs
- D0–D7 data inputs; Q0–Q7 outputs
- Latch enable input G: when G is asserted, Q follows D; when G is deasserted, Q holds
- Output enable input OE: controls tri-state outputs (outputs enabled or placed in high impedance)
- HCT family: TTL-compatible inputs, 4.5–5.5 V supply
- Low-power CMOS design suitable for fast bus and storage apps
- Typical use as an octal register/buffer with bidirectional bus interface
- Available in standard package options (including PWR lead-free variants)
Pinout
- Pin count: 20 pins (20-pin package)
- Function: Octal (8-bit) D-type register with 3-state outputs. It captures D0–D7 on the rising edge of the clock input and presents the stored bits on Q0–Q7; the G (output enable) input tri-states the outputs when asserted/de-asserted.
- Function: Octal (8-bit) D-type register with 3-state outputs. It captures D0–D7 on the rising edge of the clock input and presents the stored bits on Q0–Q7; the G (output enable) input tri-states the outputs when asserted/de-asserted.
Manufacturer
Manufacturer: Texas Instruments (TI).
Kind of company: An American multinational corporation that designs and manufactures semiconductors and integrated circuits (one of the largest IC makers), headquartered in Dallas, Texas.
Kind of company: An American multinational corporation that designs and manufactures semiconductors and integrated circuits (one of the largest IC makers), headquartered in Dallas, Texas.
Application
SN74HCT273PWR is an 8‑bit edge‑triggered D-type register with tri‑state outputs. Typical applications:
- Data storage/registers in microprocessor/microcontroller data paths
- Bus buffering and isolation between devices on a shared bus
- Demultiplexing/address/data buses in multiplexed systems
- Pipeline or state‑machine data paths requiring an 8‑bit register stage
- 8‑bit I/O expansion and display/data latching
- Temporary data holding for timing adjustment and synchronization
Its tri‑state outputs allow easy bus sharing and high/low impedance states as needed.
- Data storage/registers in microprocessor/microcontroller data paths
- Bus buffering and isolation between devices on a shared bus
- Demultiplexing/address/data buses in multiplexed systems
- Pipeline or state‑machine data paths requiring an 8‑bit register stage
- 8‑bit I/O expansion and display/data latching
- Temporary data holding for timing adjustment and synchronization
Its tri‑state outputs allow easy bus sharing and high/low impedance states as needed.
Package
SN74HCT273PWR comes in a 20-pin plastic surface-mount package (SOIC). The PWR suffix denotes the standard RoHS-compliant plastic 20‑lead package version.
